INTRODUCTION TO PARALLEL COMPUTING BY ANANTH GRAMA PDF

Therefore, there can be no cycles of odd length in a hypercube. Proof adapted from Saad and Shultz [SS88]. A p-processor hypercube has the property that every processor has log p communication links, one each to a processor whose label differs in one bit position. Since the selected d bits are fixed for each processor in the group, no communication link corresponding to these bit positions exists between processors within a group.

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Therefore, there can be no cycles of odd length in a hypercube. Proof adapted from Saad and Shultz [SS88]. A p-processor hypercube has the property that every processor has log p communication links, one each to a processor whose label differs in one bit position. Since the selected d bits are fixed for each processor in the group, no communication link corresponding to these bit positions exists between processors within a group.

Therefore, the processors in the group are connected in a hypercube topology. The proposition can be proved by starting with a partition in which both halves form subcubes. Now, by moving a single processor Chapter 2 5 from one partition to the other, we eliminate one communication link across the boundary.

In this way, moving processors across the boundary, we can see that the minima resulting from any perturbation is one in which the two partitions are subcubes. Therefore, the bisection width is p. By configuring the mesh appropriately, the distance between any two processors can be made to be independent of the number of processors.

Therefore, the diameter of the network is O 1. This can however be debated because reconfiguring the network in a particular manner might leave other processors that may be more than one communication link away from each other. However, for several communication operations, the network can be configured so that the communication time is independent of the number of processors. Each processor has a reconfigurable set of switches associated with it.

From Figure 2. Therefore, the total number of switching elements is 6 p. The basic advantage of the reconfigurable mesh results from the fact that any pair of processors can communicate with each other in constant time independent of the number of processors. Because of this, many communication operations can be performed much faster on a reconfigurable mesh as compared to its regular counterpart.

However, the number of switches in a reconfigurable mesh is larger. Therefore, the bisection width of a mesh of trees is p. The processors at the two extremities of the mesh of trees require the largest number of communication links to communicate. There are 2 p such rows and columns. Leighton [Lei92a] discusses this architecture and its properties in detail. The processor labels can be expressed in the form of a d-tuple. The minimum number of communication links across a partition are obtained when the coordinate along one of the dimensions is fixed.

The diameter of the network can be derived by traversing along each dimension. The advantages of a mesh of trees is that it has a smaller diameter compared to a mesh. However, this comes at the cost of increased hardware in the form of switches. Furthermore, it is difficult to derive a clean planar structure, as is the case with 2-dimensional meshes. The embedding of the mesh can be performed as follows: Map processor i, j, k in the mesh to processor 6 Models of Parallel Computers Figure 2.

G i, x G j, y G k, z concatenation of the Gray codes in the hypercube using the Gray code function G described in Section 2. To understand how this mapping works, consider the partitioning of the d bits in the processor labels into three groups consisting of x, y, and z bits.

Fixing bits corresponding to any two groups yields a subcube corresponding to the other group. Since j and k are identical, G j, y and G k, z are fixed. This means that the two processors lie in a subcube of 2x processors corresponding to the first x bits. It can be verified similarly that the other processors in the mesh which are directly connected to processor i, j, k also have a direct communication link in the hypercube. Consider the congestion of the inverse mapping.

It can be shown that this mapping yields the best congestion for the mapping of a hypercube into a mesh. Since the mesh links operate at 25 million bytes per second and those of the hypercube operate at 2 million bytes per second, the mesh architecture is indeed strictly superior to the hypercube. Each processor in a k-ary d-cube has 2d communication links.

Therefore, the total number of communication links is pd. The bisection width of a k-ary d-cube can be derived by fixing one of the dimensions and counting the number of links crossing this hyperplane. The factor of 2 results because of the wraparound connections. Chapter 2.

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Introduction to Parallel Computing

Introduction to Parallel Computing, Second Edition Ananth Grama George Karypis Vipin Kumar Increasingly, parallel processing is being seen as the only cost-effective method for the fast solution of computationally large and data-intensive problems. The emergence of inexpensive parallel computers such as commodity desktop multiprocessors and clusters of workstations or PCs has made such parallel methods generally applicable, as have software standards for portable parallel programming. This sets the stage for substantial growth in parallel software. Data-intensive applications such as transaction processing and information retrieval, data mining and analysis and multimedia services have provided a new challenge for the modern generation of parallel platforms. Emerging areas such as computational biology and nanotechnology have implications for algorithms and systems development, while changes in architectures, programming models and applications have implications for how parallel platforms are made available to users in the form of grid-based services.

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Introduction to Parallel Computing

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